|
|
KEI/PLO
Programmable Logic Devices
Guarantors: doc. Ing. Martin Poupa, Ph.D.
|
|
|
|
Information about course
| Brief information |
KEI/PLO
,
Programmable Logic Devices
|
| Teaching |
Winter semester
,
Lecture 2 [Hours/Week]
Tutorial 2 [Hours/Week]
|
| Completion |
Exam,
4 credits,
|
|
Course has neither
prerequisite
nor
preclusive
nor
recommended (for your information)
courses...
|
|
|
|
|
Course annotation
KEI/PLO
-IS/STAG
| The course explains the basics of CPLD and FPGA architectures of different manufacturers, function and application of programmable logic devices and basics of VHDL language. Next course explains description of the digital system by VHDL language (a description of the logic gates, multiplexers, flip-flops, RAM, ROM, state machines, RTL description, the synchronous design). Design and verification of functions of the proposed digital system in VHDL by functional and timing simulation, the practical verification of the design in the FPGA device. |
|
|
|
|
|
|
News
|
|
No news entered at the moment
|
|
|
|
| |
|
|
![[RSS]](/zdroje/images/icons/rss.png){kind=icon}
